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Dynamics of analog logic-gate networks for machine learning

TitleDynamics of analog logic-gate networks for machine learning
Publication TypeJournal Article
Year of Publication2019
AuthorsI. Shani, L. Shaughnessy, J. Rzasa, A. Restelli, B. R. Hunt, H. Komkov, and D. P. Lathrop
JournalChaos
Volume29
Pagination123130
Date PublishedDEC
Type of ArticleArticle
ISSN1054-1500
Abstract

We describe the continuous-time dynamics of networks implemented on Field Programable Gate Arrays (FPGAs). The networks can perform Boolean operations when the FPGA is in the clocked (digital) mode; however, we run the programed FPGA in the unclocked (analog) mode. Our motivation is to use these FPGA networks as ultrafast machine-learning processors, using the technique of reservoir computing. We study both the undriven dynamics and the input response of these networks as we vary network design parameters, and we relate the dynamics to accuracy on two machine-learning tasks. Published under license by AIP Publishing.

DOI10.1063/1.5123753